.. _qpu_index_about:

===========================
QPU Hardware and Properties
===========================

.. toctree::
    :hidden:
    :maxdepth: 1

    index_solver_properties
    annealing
    topologies
    operation_timing
    errors

Technical details on the QPU hardware and features.

.. grid:: 3
    :gutter: 2

    .. grid-item-card:: :ref:`qpu_index_solver_properties`
        :link: qpu_index_solver_properties
        :link-type: ref

        Properties that characterize behaviors and features of QPU solvers.

    .. grid-item-card:: :ref:`qpu_annealing`
        :link: qpu_annealing
        :link-type: ref

        How quantum annealing is implemented and features to control it.

    .. grid-item-card:: :ref:`qpu_topologies`
        :link: qpu_topologies
        :link-type: ref

        Layout of the QPU.

    .. grid-item-card:: :ref:`qpu_operation_timing`
        :link: qpu_operation_timing
        :link-type: ref

        Computation process of D-Wave quantum computers.

    .. grid-item-card:: :ref:`qpu_errors`
        :link: qpu_errors
        :link-type: ref

        Errors sources and correction.
        
Example
=======

.. include:: ../shared/examples.rst
  :start-after: start_qpu2
  :end-before: end_qpu2